Hardware Description Language - Revision history

Demindiro: /* List of HDLs */ Add Calyx

2025-03-22T11:29:43Z

List of HDLs: Add Calyx

← Older revision		Revision as of 11:29, 22 March 2025
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	\|-		\|-
	! Name !! Simulation !! Synthesis !! Allows non-synthesizable constructs		! Name !! Simulation !! Synthesis !! Allows non-synthesizable constructs
			\|-
			\| [https://calyxir.org/ Calyx]
			\| ?
			\| ?
			\| ?
	\|-		\|-
	\| [https://www.chisel-lang.org/ Chisel]		\| [https://www.chisel-lang.org/ Chisel]

Demindiro: /* List of HDLs */ replace "type system" with "allows non-synthesizable constructs", which is the more interesting property.

2025-03-21T20:55:27Z

List of HDLs: replace "type system" with "allows non-synthesizable constructs", which is the more interesting property.

← Older revision		Revision as of 20:55, 21 March 2025
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	\|+ Caption text		\|+ Caption text
	\|-		\|-
	! Name !! Simulation !! Synthesis !! ~~Type system~~		! Name !! Simulation !! Synthesis !! Allows non-synthesizable constructs
	\|-		\|-
	\| [https://www.chisel-lang.org/ Chisel]		\| [https://www.chisel-lang.org/ Chisel]
Line 40:		Line 40:
	\| Yes		\| Yes
	\| Yes		\| Yes
	\| ~~Static, strong~~		\| ?
	\|-		\|-
	\| [https://github.com/SpinalHDL/SpinalHDL SpinalHDL]		\| [https://github.com/SpinalHDL/SpinalHDL SpinalHDL]
	\| Yes		\| Yes
	\| Yes		\| Yes
	\| ~~Static, strong~~		\| ?
	\|}		\|}

Demindiro: /* List of HDLs */ sortable table + feature matrix

2025-03-21T20:53:07Z

List of HDLs: sortable table + feature matrix

← Older revision		Revision as of 20:53, 21 March 2025
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	This list is incomplete. Feel free to add more entries.		This list is incomplete. Feel free to add more entries.

	~~<em>Please keep the list alphabetic.</em>~~		{\|class="wikitable sortable"
			\|+ Caption text
	* [https://www.chisel-lang.org/ Chisel]		\|-
	* [https://clash-lang.org/ Clash]		! Name !! Simulation !! Synthesis !! Type system
	* [https://www.myhdl.org/ MyHDL]		\|-
	* [https://rust-hdl.org/ RustHDL]		\| [https://www.chisel-lang.org/ Chisel]
	* [https://github.com/SpinalHDL/SpinalHDL SpinalHDL]		\| ?
			\| ?
			\| ?
			\|-
			\| [https://clash-lang.org/ Clash]
			\| ?
			\| ?
			\| ?
			\|-
			\| [https://www.myhdl.org/ MyHDL]
			\| ?
			\| ?
			\| ?
			\|-
			\| [https://rust-hdl.org/ RustHDL]
			\| Yes
			\| Yes
			\| Static, strong
			\|-
			\| [https://github.com/SpinalHDL/SpinalHDL SpinalHDL]
			\| Yes
			\| Yes
			\| Static, strong
			\|}

	== See also ==		== See also ==

Demindiro: Created page with "A hardware description language, or HDL, is a tool to describe the behavior of electronic circuits. While intended for simulation, most (all..."

2025-03-21T20:35:46Z

Created page with "A hardware description language, or HDL, is a tool to describe the behavior of electronic circuits. While intended for simulation, most (all..."

New page

A hardware description language, or HDL, is a tool to describe the behavior of electronic circuits.

While intended for simulation, most (all?) HDLs are also usable to synthesize physical circuits. However, beware some languages support constructs that cannot actually be translated to a physical circuit.

The most common HDL is [[Verilog]], followed by [[VHDL]]. Many other HDLs are translated to Verilog under the hood.

== Simulation ==

[[Verilator]]

== Synthesis ==

[[Yosys]]

== List of HDLs ==

This list is incomplete. Feel free to add more entries.

Please keep the list alphabetic.

* [https://www.chisel-lang.org/ Chisel]
* [https://clash-lang.org/ Clash]
* [https://www.myhdl.org/ MyHDL]
* [https://rust-hdl.org/ RustHDL]
* [https://github.com/SpinalHDL/SpinalHDL SpinalHDL]

== See also ==

=== External references ===

* [https://github.com/drom/awesome-hdl Awesome Hardware Description Languages] - a list of HDLs and associated tools