CPUdev wiki - User contributions [en]

Main Page

2025-06-21T14:09:38Z

Immibis:

{| style="width: 100%; text-align: center; background-color: #fff7f2; border: solid 1px #ffddc6; margin-bottom: 14px;" |
|
<p style="font-size: xx-large; margin: 0;">Homebrew CPU Wiki</p>
This main page is mostly a placeholder for now.<br>
To get editing permission, create an account and send a private message to immibis on IRC - irc.oftc.net
|}

{| style="width: 100%;" |
| style="vertical-align: top;" |



{{Box|title=Getting started|
Essential knowledge:
* [[Introduction to digital logic]]
* [[Binary arithmetic]]
* [[How a computer works]]
Designing and simulating a CPU:
* [[Getting started - Logisim]]
* [[Getting started - FPGAs]]
Building a CPU in real life:
* [[Electronics primer]]
* [[Getting started - logic chips]]
* [[Getting started - transistor circuits]]
* [[Getting started - relay circuits]]
}}
{{Box|title=Basic CPU design|
Important design considerations:
* [[Programmer's model]]
* [[Harvard vs Von Neumann]]
* [[RISC vs CISC]]
* [[Number of bits]]
Hardware design:
* [[Instruction encoding]]
* [[Data path]]
* [[ALU]]
* [[Control unit]]
}}
{{Box|title=Software|
* [[Emulator]]
* [[Assembly language]]
* [[C language]]
* [[Forth language]]
}}
{{Box|title=Advanced topics|
Instruction set extensions:
* [[Exceptions and interrupts]]
* [[Floating-point unit]]
* [[Virtual memory]]
Performance tricks:
* [[Instruction prefetching]]
* [[Pipelining]]
* [[Branch prediction]]
* [[Data cache]]
* [[Out-of-order execution]]
* [[Register renaming]]
}}

| style="vertical-align: top; padding-left: 10px;" |



{{Box|title=Logic references|
* [[Relay logic]]
* [[Logic level reference]]
* [[Logic chip reference]]
}}
{{Box|title=External interfaces|
* [[UART]]
* [[I2C]] / [[SPI]]
* [[VGA]]
* [[PS/2]] (mouse and keyboard)
* [[Ethernet]]
* [[USB]]
}} 
{{Box|title=CPU projects|
* [https://www.bigmessowires.com/bmow1/ Big Mess of Wires]
* [http://www.homebrewcpu.com/ Magic-1]
* [http://megaprocessor.com/ Megaprocessor]
* [https://monster6502.com/ Monster 6502]
* [https://relaycomputer.co.uk/pages/overview.html Paul Law's relay computer]
* [http://zipcpu.com/about/zipcpu.html ZipCPU]
}}

|}

Introduction to digital logic

2025-06-15T12:00:58Z

Immibis: add a section on sequential circuits

[https://en.wikipedia.org/wiki/Boolean_algebra Boolean algebra] (after George Boole) is the mathematical study of statements that are true or false. Several decades later, Claude Shannon realized the same ideas could be used to build electronic circuits to compute things in binary.

== Boolean mathematics ==

Boolean algebra is similar to ordinary algebra: we can write down equations and solve them (or prove they are right or wrong). However, instead of numbers, Boolean equations work on the "numbers" ⊤ (true) and ⊥ or F (false). In binary these are also written as 1 and 0, and we'll use that because this is a wiki about calculating things in binary. Instead of +, -, ×, ÷ and so on, the things you can do with the numbers are ∧, ∨ and ¬. Let's take a look at them.

∧ is the "AND" operator (or, by its more fancy name, "conjunction"). 1∧1=1, but 0∧1=0, 1∧0=0 and 0∧0=0. A AND B is true only if A is true and B is true. Makes sense, right? Since the sides are only true or false, there are only 4 ways it can be, and the rule should be easy to remember - there's no need to memorize AND tables like how you had to memorize times tables at school. You have to remember the symbol: ∧ looks a bit like A for AND.

∨ is the "OR" operator (fancy name: "disjunction"). It's true if either side is true, even if both sides are true. So 1∨1=1, 1∨0=1, 0∨1=1, and 0∨0=0. To remember the symbol: it's the opposite of AND.

¬ is the "NOT" operator (fancy name: "complement" or "inversion" or "negation"). It's true if the thing that comes after it is false. ¬0=1 and ¬1=0.

Also - more commonly used in digital logic than in pure mathematics - is the ⊕ "XOR" operator. It's true if one side is true but not both.

So if x and y have different values, here's what each combination would give you:


{| class="wikitable" style="text-align: center"
|-
!x
!y
!x ∧ y<br>(AND)
!x ∨ y<br>(OR)
!x ⊕ y<br>(XOR)
|-
!0 !! 0
| 0 || 0 || 0
|-
!1 !! 0
| 0 || 1 || 1
|-
!0 !! 1
| 0 || 1 || 1
|-
!1 !! 1
| 1 || 1 || 0
|}
{| class="wikitable" style="text-align: center"
|-
!x
!¬x<br>(NOT)
|-
!0
|1
|-
!1
|0
|}

== Some Boolean algebraic laws ==

Just like normal maths, we can write more complicated equations and solve them. For example, 1∧((0∧1)∨¬(1∧¬1)) is 1.

Like in normal algebra, we use letters to stand for things we don't know. So if we have a∧b we can't tell if it's 0 or 1 until we know whether a stands for 0 or 1, and whether b stands for 0 or 1. But we ''can'' tell that a∧0 is always 0, no matter what a stands for, and we can simplify equations like this. Even if a stands for another really complicated equation, we know that a∧0 is 0.

If we see ((a∧b)∨(c∧¬d∧0)) we know it's the same as just a∧b since the second part is always 0, since x∧0 is 0 no matter what x is, and then x∨0 is x no matter what x is.

(TODO: include a list of simplifying rules without just copying Wikipedia?)

== Digital logic circuits ==

Digital logic lets us build machines that calculate Boolean equations. Each operator becomes a little circuit, which is called a *logic gate*, and we can wire them together to calculate complicated equations. We don't draw how each gate is made, but just which ones are used and how they're wired together. Each Boolean operator also has a logic gate symbol. We can make a logic circuit so that if we tell it what a, b, c and d stand for, it will tell us what ((a∧b)∨¬(¬a∧c∧¬d)) is.

(insert a diagram, or even better, an interactive simulation, of a circuit that does this)

== Doing something useful ==

We can make circuits that compute useful things. We can make a simple calculator - if we have a number a and a number b, that are 0, 1 or 2, we can write a set of equations that calculates the answer, and make a machine that calculates them.

out0 = a0 ∧ b0<br>
out1 = (a1 ∧ b0) ∨ (a0 ∧ b1)<br>
out2 = (a2 ∧ b0) ∨ (a1 ∧ b1) ∨ (a0 ∧ b2)<br>
etc...

(insert a diagram, or even better, an interactive simulation, of a circuit that does this)

Of course, as you'll see later on, it's better to calculate with binary numbers.

== Memory ==

Digital logic can also use memory units. The most straightforward type is a "D-latch". A single D-latch remembers a true or false value; when its enable signal is true, it remembers the new true or false value from its input. When it's false, it continues remembering the same value. What does it start with, when the power is turned on, before it gets an enable signal? Depending on the design, it might be made to start with true, start with false, or start with an unpredictable true or false. Some designs also have a reset signal which sets the remembered value to false.

Being able to store the output from a circuit and feed it back into the same circuit is one of the most powerful abilities of digital logic because it allows for multiple computation steps. For example, if you feed the output from an adding circuit back to the input, you can reset it to 0, then keep feeding different numbers into the other input, and calculate the sum total of all the numbers you put in.

(insert a diagram, or even better, an interactive simulation, of this non-working circuit)

But there's a big problem with this idea: pacing. If you put 1 into the second input, and enable the latch, you meant to calculate 0+1=1, but the adding circuit will calculate 0+1=1, then the 1 will loop around through the latch and it will calculate 1+1=2, then the 2 will loop around and it will calculate 2+1=3, and so on. The numbers will race around the loop as fast as the adding circuit can calculate. Worse, if there are several bits involved (e.g. when adding numbers in binary) the different parts of the same number may get out of sync and cause the answer to be even more wrong.

You could solve this by providing a very short enable signal - so short that the enable turns off before the next number loops around. But you have to make sure the signal is extremely short, and the exact length can vary depending on the temperature, the voltage, etc. It's much more reliable to build a latch that only updates once when the enable signal goes from 0 to 1 (a "rising edge") and then there's no need to be careful with the signal speed. To make it update again, you'd have to turn the enable signal back to 0 and back again to 1. In this case the enable signal is known as a *clock* signal and the latch is called a *D flip-flop*. You know the adding circuit loop will process the number exactly once, each time the clock goes from 0 to 1 and back to 0.

(insert a diagram, or even better, an interactive simulation, of this better circuit)

Most D flip-flops have an enable signal as well as a clock signal. The flip-flop will only update when the clock goes from 0 to 1 *and* the enable is 1 at the same time. This makes it even easier to design reliable circuits. When you use logic gates to calculate some equation, they take a little time to update and in a half-updated state, could generate a "glitch" pulse from 0 to 1 and back to 0 even if they final output is still 0. If you used logic gates to calculate a clock signal, or an enable signal for a latch, you'd have to be very careful not to let this happen - possible, but difficult. But this isn't a problem for a flip-flop's enable signal, since it only cares at the exact moment of the clock's rising edge.

Introduction to digital logic

2025-06-15T11:28:47Z

Immibis: # is for markdown

Introduction to digital logic

2025-06-15T11:27:36Z

Immibis:

Introduction to digital logic

2025-06-15T11:26:11Z

Immibis: first draft

Ethernet

2025-03-21T19:15:05Z

Immibis: /* Ethernet packet */

Ethernet is a ''wired'' protocol for connecting many devices in a network such that they can transfer data between each other.
It defines both the physical layers (10BASE-T, 100BASE-TX ...) as well the data format of an Ethernet packet & frame.

= Ethernet packet & frame =

There are two major formats of ethernet ''packets'':
the regular variant which supports MTUs (Maximum Transmission Unit) of up to 1500 bytes
and "jumbo frames", which support MTUs of up to 9000 bytes.
The latter are only supported for gigabit links and higher.

'''Note:''' each byte is transmitted starting from its LSb to its MSb.

== Ethernet packet ==

Every Ethernet packet starts with a preamble.
This preamble is a repeated pattern of <code>01010101</code> bits (hex: <code>0x55</code>).
This pattern is used to synchronize the clock as well as signal to the receiver a frame is about to be transmitted.
The preamble consists of 7 bytes.

Immediately followed after the preamble is the SFD (Start Frame Delimiter).
This byte has the value <code>11010101</code> (<code>0xd5</code>) and indicates the start of the Ethernet Frame.

After the Ethernet Frame there is an IPG (InterPacket Gap) of 12 bytes during which no data is sent whatsoever.

{| class="wikitable"
|+ Ethernet packet
|-
! Preamble !! SFD !! Ethernet frame !! IPG
|-
| 0x55, 7 times || 0xd5 || ... || 12 bytes of nothing
|}

== Ethernet frame ==

An Ethernet frame is at least 64 bytes long.

Each frame ends with a FCS (Frame Check Sequence) which is a CRC32 of all preceding frame data.

{| class="wikitable"
|+ Ethernet frame
|-
! Destination MAC address !! Source MAC address !! EtherType !! Payload !! FCS
|-
| 6 bytes || 6 bytes || 2 bytes || At least 46 bytes || 4 bytes
|}

The "EtherType" <code>0x8100</code> indicate a 802.1Q tag is present, in which case the format is as follows:

{| class="wikitable"
|+ Ethernet frame with 802.1Q tag
|-
! Destination MAC address !! Source MAC address !! 802.1Q tag !! EtherType !! Payload !! FCS
|-
| 6 bytes || 6 bytes || 4 bytes || 2 bytes || At least 42 bytes || 4 bytes
|}

The "real" EtherType is located right after the tag.

{| class="wikitable"
|+ 802.1Q tag
|-
! TPID !! TCI
|-
| 0x8100 || ...
|}

= Interfaces =

There are various types of interfaces to interact with Ethernet controllers.

== Media Independent Interface (MII) ==

The MII is the most common type of interface. Several variants exists for higher speeds or lower pin count.

=== Standard ===

The standard MII interfaces supports 10BASE-T and 100BASE-TX.

{| class="wikitable"
|+ MII pins
|-
! Pin(s) !! Description
|-
| TX_CLK || Transmission clock. Must be used when sending data.
|-
| TXD[0:3] || 4 bits of data to transmit if TX_EN is high.
|-
| TX_EN || When high, transmit data.
|-
| TX_ER || When high, force a transmission error.
|-
| RX_CLK || Receive clock. Must be used when receiving data.
|-
| RXD[0:3] || 4 bits of received data when RX_DV is high.
|-
| RX_DV || Whether data is currently being received.
|-
| RX_ER || Whether an error occured during reception.
|-
| CRS || Carrier sense. TODO
|-
| COL || Collision detect. TODO
|-
| MDIO
|-
| MDC
|}

When receiving or sending data, the '''high''' nibble (4 bits) is sent first, then the low nibble.

It is possible some bytes of the preamble may be missing on reception. This may happen if the controller detects the signal late.

RISC vs CISC

2025-03-19T20:08:43Z

Immibis: write more about the implementation differences

Contemporary usage of the terms RISC and CISC is muddy, but originally referred to the amount of operations a single instruction could (or should) do.

For example, swapping values between a register and a memory location on a RISC machine may be done as:
<source>
ld.w x3,[x2] ; 1 cycle
st.w [x2],x1 ; 1 cycle
mv x1,x3 ; 1 cycle
</source>
Whereas on a CISC machine it might be done as:
<source>
xchg x1,[x2] ; 3 cycles
</source>
RISC cores tend to be smaller and simpler, allowing higher clock speeds to be achieved. CISC cores tend to be more complex but usually have better code density.

CISC processors were often characterized by their extensive, [[microcode]]-based [[control unit]]s to coordinate the different steps that needed to be performed during an instruction, while RISC processors could get by with much simpler control units using only [[random logic]]. The space saved by the simpler control unit could be used to expand the [[register file]], as in the [[ARM1]].

A well-designed CISC instruction set encodes instructions compactly, using less memory. RISC architectures typically use the same size for each instruction, while CISC architectures typically vary the instruction length as needed, as well as performing several steps in a single instruction — both of which can be viewed as forms of compression. On the other hand, the "wasted" bits that are not necessary for a particular RISC instruction can be put to novel uses, such as the condition codes and integrated shifting in [[ARM]].

In practice, modern ISAs are a hybrid between the two approaches, with both simple and complex instructions.

Main Page

2021-07-06T17:43:32Z

Immibis: added external interfaces to try and balance it more

{| style="width: 100%; text-align: center; background-color: #fff7f2; border: solid 1px #ffddc6; margin-bottom: 14px;" |
|
<p style="font-size: xx-large; margin: 0;">Homebrew CPU Wiki</p>
This main page is mostly a placeholder for now.<br>
To get editing permission, create an account and ping immibis on IRC. irc.libera.chat #cpudev
|}

{| style="width: 100%;" |
| style="vertical-align: top;" |



{{Box|title=Getting started|
Essential knowledge:
* [[Introduction to digital logic]]
* [[Binary arithmetic]]
* [[How a computer works]]
Designing and simulating a CPU:
* [[Getting started - Logisim]]
* [[Getting started - FPGAs]]
Building a CPU in real life:
* [[Electronics primer]]
* [[Getting started - logic chips]]
* [[Getting started - transistor circuits]]
* [[Getting started - relay circuits]]
}}
{{Box|title=Basic CPU design|
Important design considerations:
* [[Programmer's model]]
* [[Harvard vs Von Neumann]]
* [[RISC vs CISC]]
* [[Number of bits]]
Hardware design:
* [[Instruction encoding]]
* [[Data path]]
* [[ALU]]
* [[Control unit]]
}}
{{Box|title=Software|
* [[Emulator]]
* [[Assembly language]]
* [[C language]]
* [[Forth language]]
}}
{{Box|title=Advanced topics|
Instruction set extensions:
* [[Exceptions and interrupts]]
* [[Floating-point unit]]
* [[Virtual memory]]
Performance tricks:
* [[Instruction prefetching]]
* [[Pipelining]]
* [[Branch prediction]]
* [[Data cache]]
* [[Out-of-order execution]]
* [[Register renaming]]
}}

| style="vertical-align: top; padding-left: 10px;" |



{{Box|title=Logic references|
* [[Relay logic]]
* [[Logic level reference]]
* [[Logic chip reference]]
}}
{{Box|title=External interfaces|
* [[UART]]
* [[I2C]] / [[SPI]]
* [[VGA]]
* [[PS/2]] (mouse and keyboard)
* [[Ethernet]]
* [[USB]]
}} 
{{Box|title=CPU projects|
* [https://www.bigmessowires.com/bmow1/ Big Mess of Wires]
* [http://www.homebrewcpu.com/ Magic-1]
* [http://megaprocessor.com/ Megaprocessor]
* [https://monster6502.com/ Monster 6502]
* [https://relaycomputer.co.uk/pages/overview.html Paul Law's relay computer]
* [http://zipcpu.com/about/zipcpu.html ZipCPU]
}}

|}

Main Page

2021-07-05T21:18:51Z

Immibis: another revision

{| style="width: 100%; text-align: center; background-color: #fff7f2; border: solid 1px #ffddc6; margin-bottom: 14px;" |
|
<p style="font-size: xx-large; margin: 0;">Homebrew CPU Wiki</p>
This main page is mostly a placeholder for now.<br>
To get editing permission, create an account and ping immibis on IRC. irc.libera.chat #cpudev
|}

{| style="width: 100%;" |
| style="vertical-align: top;" |



{{Box|title=Getting started|
Essential knowledge:
* [[Introduction to digital logic]]
* [[Binary arithmetic]]
* [[How a computer works]]
Designing and simulating a CPU:
* [[Getting started - Logisim]]
* [[Getting started - FPGAs]]
Building a CPU in real life:
* [[Electronics primer]]
* [[Getting started - logic chips]]
* [[Getting started - transistor circuits]]
* [[Getting started - relay circuits]]
}}
{{Box|title=Basic CPU design|
Important design considerations:
* [[Programmer's model]]
* [[Harvard vs Von Neumann]]
* [[RISC vs CISC]]
* [[Number of bits]]
Hardware design:
* [[Instruction encoding]]
* [[Data path]]
* [[ALU]]
* [[Control unit]]
}}
{{Box|title=Software|
* [[Emulator]]
* [[Assembly language]]
* [[C language]]
* [[Forth language]]
}}
{{Box|title=Advanced topics|
Instruction set extensions:
* [[Exceptions and interrupts]]
* [[Floating-point unit]]
* [[Virtual memory]]
Performance tricks:
* [[Instruction prefetching]]
* [[Pipelining]]
* [[Branch prediction]]
* [[Data cache]]
* [[Out-of-order execution]]
* [[Register renaming]]
}}

| style="vertical-align: top; padding-left: 10px;" |



{{Box|title=Logic reference|
* [[Relay logic]]
* [[Logic level reference]]
* [[Logic chip reference]]
}} 
{{Box|title=CPU projects|
* [https://www.bigmessowires.com/bmow1/ Big Mess of Wires]
* [http://www.homebrewcpu.com/ Magic-1]
* [http://megaprocessor.com/ Megaprocessor]
* [https://monster6502.com/ Monster 6502]
* [https://relaycomputer.co.uk/pages/overview.html Paul Law's relay computer]
* [http://zipcpu.com/about/zipcpu.html ZipCPU]
}}

|}

Main Page

2021-07-05T18:56:18Z

Immibis: Use the new Box template

Template:Box

2021-07-05T18:55:00Z

Immibis: Params start at 1

<div style="background-color: #fff7f2; border: solid 1px #ffddc6; padding: 0.5em; margin-bottom: 13px;">
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"type": "content"
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"description": "makes a box like on the homepage",
"maps": {
"asd": {}
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"paramOrder": [
"title",
"1"
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"format": "block"
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Template:Box

2021-07-05T18:54:19Z

Immibis: Created page with "<div style="background-color: #fff7f2; border: solid 1px #ffddc6; padding: 0.5em; margin-bottom: 13px;"> <div style="font-weight: bold; background-color: #ffe7d6; margin: 0; b..."

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<noinclude>
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Main Page

2021-07-05T00:17:58Z

Immibis: add a bunch more placeholder links

{| style="width: 100%; text-align: center; background-color: #fff7f2; border: solid 1px #ffddc6; margin-bottom: 14px;" |
|
<p style="font-size: xx-large; margin: 0;">Homebrew CPU Wiki</p>
This main page is mostly a placeholder for now.<br>
To get editing permission, create an account and ping immibis on IRC. irc.libera.chat #cpudev
|}

{| style="width: 100%;" |
| style="vertical-align: top;" |
<div style="background-color: #fff7f2; border: solid 1px #ffddc6; padding: 0.5em; margin-bottom: 13px;">
<div style="font-weight: bold; background-color: #ffe7d6; margin: 0; border: solid 1px #ffddc6; padding: 0 0.5em 0 0.5em;">Major components and concepts</div>
* [[Instruction Set Architecture]]
* [[Control unit]]
** [[Instruction decoding]]
** [[Microcode]]
* [[ALU]]
* [[Memory bus]]
** [[RAM]]
** [[Memory-mapped IO]]
* [[External interfaces]]
** [[UART console]]
** [[GPIO]]
** [[SD card storage]]
** [[Character LCD]]
** [[PS/2 keyboard]]
** [[Audio output]]
** [[VGA video]]
** [[USB]]
</div>

<div style="background-color: #fff7f2; border: solid 1px #ffddc6; padding: 0.5em; margin-bottom: 13px;">
<div style="font-weight: bold; background-color: #ffe7d6; margin: 0; border: solid 1px #ffddc6; padding: 0 0.5em 0 0.5em;">Software</div>
* [[Writing an assembler]]
* [[Writing an emulator]]
</div>

<div style="background-color: #fff7f2; border: solid 1px #ffddc6; padding: 0.5em; margin-bottom: 13px;">
<div style="font-weight: bold; background-color: #ffe7d6; margin: 0; border: solid 1px #ffddc6; padding: 0 0.5em 0 0.5em;">Advanced instruction set</div>
* [[Interrupts and exceptions]]
* [[Virtual memory]]
* [[Memory protection]]
</div>

<div style="background-color: #fff7f2; border: solid 1px #ffddc6; padding: 0.5em; margin-bottom: 13px;">
<div style="font-weight: bold; background-color: #ffe7d6; margin: 0; border: solid 1px #ffddc6; padding: 0 0.5em 0 0.5em;">Performance optimizations</div>
* [[Prefetching]]
* [[Branch prediction]]
* [[Data cache]]
* [[Out-of-order execution]]
* [[Register renaming]]
</div>

| style="vertical-align: top; padding-left: 10px;" |
<div style="background-color: #fff7f2; border: solid 1px #ffddc6; padding: 0.5em; margin-bottom: 13px;">
<div style="font-weight: bold; background-color: #ffe7d6; margin: 0; border: solid 1px #ffddc6; padding: 0 0.5em 0 0.5em;">Implementation technology</div>
* [[Intro to binary logic]]
** [[Logic simulators]]
* [[FPGA development]]
* [[Intro to electronics]]
** [[Logic chips]]
** [[Transistor logic]]
** [[Relay logic]]
* [[Exotic logic families]]
</div>

<div style="background-color: #fff7f2; border: solid 1px #ffddc6; padding: 0.5em; margin-bottom: 13px;">
<div style="font-weight: bold; background-color: #ffe7d6; margin: 0; border: solid 1px #ffddc6; padding: 0 0.5em 0 0.5em;">CPU projects</div>
* [https://www.bigmessowires.com/bmow1/ Big Mess of Wires]
* [http://www.homebrewcpu.com/ Magic-1]
* [http://megaprocessor.com/ Megaprocessor]
* [https://monster6502.com/ Monster 6502]
* [https://relaycomputer.co.uk/pages/overview.html Paul Law's relay computer]
* [http://zipcpu.com/about/zipcpu.html ZipCPU]
</div>

|}

Main Page

2021-07-05T00:10:09Z

Immibis:

Main Page

2021-07-05T00:09:09Z

Immibis:

Main Page

2021-07-05T00:06:28Z

Immibis: add some external links

Main Page

2021-07-05T00:02:18Z

Immibis: add contact info

Main Page

2021-07-05T00:01:38Z

Immibis: Initial main page